The trench Schottky rectifiers have been added externally in parallel to a semiconductor power device, e.g. a power trench MOSFET device for higher efficiency DC/DC applications. In parallel with the parasitic PN body diode, the trench Schottky rectifier acts as clamping diode to prevent the body diode from turning on. Therefore, many kinds of configuration have been proposed in prior arts trying to integrate the trench MOSFET and the trench Schottky rectifier on a single substrate.
In U.S. Pat. No. 6,351,018 and U.S. Pat. No. 6,987,305, configurations are disclosed to integrate trench MOSFET with trench Schottky rectifier on a same single substrate and sharing a common trenched gate. FIG. 1 illustrates one of those in U.S. Pat. No. 6,351,018 wherein the disclosed configuration comprises trench MOSFET 101 and trench Schottky rectifier 110 which both formed on an N doped substrate 102. The disclosed configuration further comprises a plurality of trenched gates 100 and 100-1 formed by refilling doped poly 106 into a plurality of gate trenches lining by a layer of gate oxide 104. Among those said trenched gates, the trenched gates 100-1, as illustrated, are shared by said trench MOSFET 101 and said trench Schottky rectifier 110 as common trenched gates. Furthermore, in portion of said trench MOSFET 101, a plurality of n+ source regions 112 are formed adjacent to the sidewalls of the trenched gates and near the surface of a plurality of P body regions 108. Between a pair of the n+ source regions 112, a P+ body contact region 114 is formed in body region with a higher doping concentration to reduce the contact resistance between the P body region and front metal. Onto a conductive layer 116 in portion of said trench MOSFET 101, and onto another conductive layer 118 in portion of said trench Schottky rectifier 110, front metal layer 120 is formed to short the source regions and the body regions of said trench MOSFET 101, to the anode of trench Schottky rectifier 110 by planar contact.
FIG. 2 shows another integrated configuration disclosed in U.S. Pat. No. 6,593,620 wherein the trench MOSFET 220 and the trench Schottky rectifier 222 have separated trenched gates. Onto an N+ substrate 200 padded by a drain metal 218 on the rear side, the N-channel integrated configuration is formed in an N epitaxial layer 202 and further comprises a plurality of trenched gates 210 and 210-1 which all filled with doped poly 206 padded by a gate oxide layer 204. The portion of said trench MOSFET 220 further comprises P body regions 208 with n+ source regions 212 formed near its top surface and adjacent to the sidewalls of the trenched gates 210. Onto the integrated configuration, front metal 216 is formed covering an insulation layer 214 to short the source region and body region in said trench MOSFET 220, to the anode of said trench Schottky rectifier 222 by planar contact.
Both configuration mentioned above can achieve the integration of the trench MOSFET and the trench Schottky rectifier on a single substrate, but it should be noticed that, planar contacts are employed to contact the source regions and the body regions of said trench MOSFET with the front metal layer, and also to contact the anode of said trench Schottky rectifier with the front metal layer. Especially for said trench MOSFET, the planar contact will limit the device shrinkage because of the large area required by the planar contact, which will result in a high specific on-resistance in said trench MOSFET.
Furthermore, when the dimension of the planar contacts is shrunk, a poor capability of metal stop coverage will be pronounced if single metal is used to fill the planar contacts and to act as front metal.
Accordingly, it would be desirable to provide new and improved integrated configuration to avoid the constraint discussed above.